Amd/motorola Technogy Development

Exhibit 10.25


AMD/Motorola Technology Development and License Agreement
December 3, 1998 - Execution Document


TECHNOLOGY DEVELOPMENT
AND LICENSE AGREEMENT


This Technology Development and License Agreement ("Agreement") is entered into as of October 1, 1998 (the "Effective Date"), by and between Advanced Micro Devices, Inc. and its Subsidiaries ("AMD"), a Delaware Corporation, with principal offices located at One AMD Place, P.O. Box 3453, Sunnyvale, California 94088-3453, and Motorola, Inc. and its Subsidiaries ("Motorola"), a Delaware corporation, with principal offices located at 1303 East Algonquin Road, Schaumburg, Illinois 60196.


RECITALS


Whereas, AMD and Motorola have complementary strengths in the flash memory, embedded logic, and microprocessor businesses and in supporting technologies and manufacturing capabilities.


Whereas, the companies believe that entering into this Agreement to take advantage of these complementary skills and needs will have value for both companies and their respective customers by accelerating the development of future technologies, increasing the likelihood of success, leveraging the capital costs required, and increasing the quantity and quality of product offerings available from each company.


Now, therefore, in consideration of the rights and obligations set forth in this Agreement, the parties agree as follows:


AGREEMENT


1. Definitions.


1.1. "Acquired Party" means a party to this Agreement that
undergoes a Change of Control.


1.2. "Acquiring Party" means the person or entity that acquires
fifty percent (50%) or more of the outstanding voting
securities of a party to this Agreement, such that the party
being acquired undergoes a Change of Control.


1.3. "AMD Technology" means technology developed solely and/or
owned solely by AMD and all solely owned intellectual property
pertaining thereto.


Confidential treatment has been requested for portions of this exhibit. The copy filed herewith omits the information subject to the confidentiality request. Omissions are designated as *****. A complete version of this exhibit has been filed separately with the Securities and Exchange Commission.


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1.4. "Change of Control" means the acquisition by a single legal
entity or natural person of fifty percent (50%) or more of the
outstanding securities of a party entitled to vote for the
board of directors of such party.


1.5. "Confidential Information" means any information disclosed by
a party (the "Disclosing Party") to the other party (the
"Receiving Party") pursuant to this Agreement in a context
which would cause a reasonable person to believe the
information is intended to be treated as confidential,
including but not limited to, documents expressly designated
as confidential, and information related to either party's
manufacturing processes, products, employees, facilities,
equipment, security systems, information systems, finances,
product plans, marketing plans, suppliers, or distributors;
provided, however that "Confidential Information" shall not
include information that: (i) is now available or becomes
available to the public without breach of this Agreement; (ii)
is explicitly approved for release by written authorization of
the Disclosing Party; (iii) is lawfully obtained from a third
party or parties without a duty of confidentiality; (iv) is
disclosed to a third party by the Disclosing Party without a
duty of confidentiality; (v) is known to the Receiving Party
prior to disclosure; or (vi) is at any time developed by the
Receiving Party independently of any such disclosure(s) from
the Disclosing Party.


1.6. "Conforming Deliverable" means a deliverable identified in a
Statement of Work that is agreed to by the parties to
substantially conform with the acceptance criteria for that
deliverable specified in the Statement of Work.


1.7. "Customer" means a company that, as a regular course of
business, purchases substantial quantities of semiconductor
products from a party to this Agreement.


1.8. ***** means a party to this Agreement providing information,
training and support to a ***** of that party regarding a
Logic Process Technology, Embedded Flash Technology, or other
semiconductor manufacturing process developed and/or licensed
under this Agreement, and *****.


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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1.9. "Data Networking Products" means semiconductor products of AMD
designed specifically for data networking applications, that
are being shipped to customers as of the Effective Date, and
specifically excludes *****, and other AMD devices which
cannot be licensed due to agreements with third parties that
were signed as of the Effective Date.


1.10. "Derivative Process" means a semiconductor fabrication
process, other than a Logic Process Technology or Embedded
Flash Technology, which incorporates, modifies or uses steps
or elements developed for and utilized in such Technologies.


1.11. "Derivative Product" means a product that incorporates, in
whole or in substantial part, a pre-existing design, or a
modification of a pre-existing design, and which may add
functionality or performance to a pre-existing design.


1.12. "Embedded Flash Technology" means a technology resulting from
incorporating a high-density non-volatile flash array process
into a logic process while maintaining compatibility with the
general design rules of the logic process. Embedded Flash
Technology includes CDR1, CDR3, HIP6F and SGEFT as are defined
generally below and are defined specifically in documents for
each Embedded Flash Technology set forth in Appendix A.
Appendix A will be updated as necessary to include documents
to specifically describe each new Embedded Flash Technology as
it is developed.


(a) "CDR1" means embedded flash technology in which
*****.


(b) "CDR3 and future CDR processes" mean embedded flash
technologies in which *****.


(c) "HIP6F" means a high performance process for
manufacturing stand-alone and embedded flash devices
based on HIP6L.


(d) "SGEFT" means subsequent generation embedded flash
technologies developed by the parties pursuant to
this Agreement, that are successors to HIP6F.


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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1.13. "Existing Product" means a product, production units of which
were first distributed to customers prior to or no more than
six (6) months after a Change of Control.


1.14. "Executive Board of Directors" means the ultimate governance
authority for the AMD-Motorola alliance.


1.15. "Foundry" means a company that manufactures semiconductor
products for a party other than a party to this Agreement, to
be purchased and resold by such party.


1.16. ***** means a party to this Agreement providing information,
training and support to a ***** of that party regarding a
Logic Process Technology, Embedded Flash Technology, or other
semiconductor manufacturing process developed and/or licensed
under this Agreement, and *****.


1.17. "Improvement" means a change or addition to a process which
improves or modifies it in some manner, including but not
limited to increasing manufacturing throughput, increasing the
performance, quality or yield of devices manufactured using
the process, decreasing the cost of utilizing the process, or
enabling the use of different materials but does not include
the manufacture of different types of devices utilizing the
process unless specifically agreed upon by the parties hereto;
provided, however, that a change or addition will constitute
an Improvement only if the process after such Improvement
still fits within the definition for that process (e.g.,
HIP5L, HIP6L or HIP7L) set forth in this Agreement.


1.18. "Intellectual Property" means all intellectual property
including but not limited to copyrights, trade secrets, and
know how but specifically excluding patents.


1.19. "IP Expenses" are fees, costs, or other charges related to
securing and maintaining intellectual property rights other
than IP Fees and Translation Expenses.


1.20. "IP Fees" are fees or other charges required to be paid to a
governmental agency, governmental office, or other
governmental entity to secure and maintain intellectual
property rights and include filing fees, registration fees,
issue fees, maintenance fees, annual taxes, and annuities.


1.21. "Joint Technology" means: (i) with respect to copyrightable
material


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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or work subject to protection under Chapter 9 of Title 17 of
the U.S. Code (Semiconductor Chip Protection Act), such
material or work qualifies as a "joint work" under 17 U.S.C.
Section 101; (ii) with respect to inventions subject to patent
protection, AMD and Motorola were "joint inventors" of such
invention under 35 U.S.C. Section 116; and (iii) with respect
to matter subject to trade secret protection, AMD and Motorola
both made substantial contributions to such matter. Where a
product or process consists of multiple parts, elements or
steps, each of which is capable of being subject to a claim of
ownership, each such part, element or step will be analyzed
separately to determine if it constitutes Joint Technology.


1.22. "Logic Process Technologies" means collectively HIP5L, HIP6L,
HIP7L, and SGLPT as are defined generally below and are
defined specifically in documents for each Logic Process
Technology set forth in Appendix B. Appendix B will be updated
as necessary to include documents to specifically describe
each new Logic Process Technology as it is developed.


(a) "HIP5L" means a high performance copper interconnect
logic process for manufacturing logic devices *****.


(b) "HIP6L" means a high performance copper interconnect
logic process for manufacturing logic devices *****.


(c) "HIP7L" means a high performance copper interconnect
logic process for manufacturing logic devices *****.


(d) "SGLPT" means subsequent generation logic process
technologies developed by the parties pursuant to
this Agreement, that are successors to HIP7L.


1.23. "Milestone" means an objectively verifiable achievement in a
Project, such as the completion of a certain stage of
development, the ability of a product or process under
development to pass certain tests, or the delivery of a
Conforming Deliverable.


1.24. "Motorola Technology" means technology developed solely and/or
owned solely by Motorola and all solely owned intellectual
property pertaining thereto.


1.25. "Non-Acquired Party" means a party to this Agreement when the
other party undergoes a Change of Control.


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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1.26. "Personal Computing Environment" means a general purpose
personal computer or server including desktop, tower or
portable enclosures, intended primarily for use by a single
user where the user is allowed to install third party
application software and that is designed to operate with data
processing applications using personal computer operating
systems, such as Windows, Windows NT, Windows CE, and Mac OS,
or server operating systems such as AIX, UNIX, or OS/400, or
larger operating systems such as VM and MVS; provided,
however, that Personal Computing Environment does not include
a palmtop or PDA or a device smaller than a palmtop or PDA,
nor does it include communications, transportation, set top
box or consumer electronics applications.


1.27. "Power PC Microprocessors" means microprocessors designed for
the Personal Computing Environment and embedded applications
utilizing the industry desktop and embedded Power PC
architectures and instruction sets.


1.28. "Program Manager" means a manager who is an employee of a
party hereto and is responsible for business and operating
issues relating to a specific Project.


1.29. "Project" means a project agreed to by the Executive Board of
Directors and undertaken pursuant to this Agreement. The
parties have agreed to undertake the Projects described in
Sections 5 and 6 of this Agreement and will complete a
Statement of Work on each of those Projects ***** of the
Effective Date or as otherwise agreed to by the parties. The
parties also intend to commence other Projects under this
Agreement and will complete Statements of Work on those
Projects as provided in Section 3.1 herein.


1.30. "Statement of Work" means a development plan for a Project in
the form attached as Exhibit C, that includes a specification
of the product or process being developed, a description of
Milestones to be achieved (including, when appropriate,
deliverables and acceptance criteria), a development schedule
specifying when the Milestones are due and when the
development is supposed to be completed, a budget estimating
expenses to be incurred by each party in connection with the
Project, designation of a Program Management Team and those
items set forth in Sections 1.8 and 1.9 of Appendix D.


1.31. "Steering Committee" means the governance authority
responsible for the day-to-day operation of the AMD-Motorola
alliance.


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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1.32. "Strategic Party" means a third party with whom a party to
this Agreement has a relationship to jointly develop and/or
design products or devices or portions of products or devices.


1.33. ***** means a party to this Agreement providing information,
training and support to a ***** of such party regarding a
Logic Process Technology, Embedded Flash Technology, or other
semiconductor manufacturing process developed and/or licensed
under this Agreement, and *****.


1.34. "Subsidiary" means a corporation, company, or other entity:


(a) more than forty percent (40%) of whose outstanding
shares or securities (representing the right to vote
for the election of directors or other managing
authority) are now or hereafter, owned or controlled,
directly or indirectly, by a party hereto, but such
corporation, company, or other entity shall be deemed
to be a Subsidiary only so long as such ownership or
control exists;


(b) which does not have outstanding shares or securities,
as may be the case in a partnership, joint venture or
unincorporated association, but more than forty
percent (40%) of whose ownership interest
representing the right to make the decisions for such
corporation, company, or other entity is now or
hereafter, owned or controlled, directly or
indirectly, by a party hereto, but such corporation,
company, or other entity shall be deemed to be a
Subsidiary only so long as such ownership or control
exists.


1.35. "Technical Coordinator" means a technical manager who is an
employee of a party and is responsible for managing the
day-to-day development effort of a Project as set forth in
Section 2.4.


1.36. "Test Technology Know How" means the methods and techniques
provided to Motorola by AMD used to produce highly reliable
flash products at cost effective test times, including: stress
modes designed into the product; the characterization
techniques used to determine the conditions used in the stress
modes and their implementation into the production test
routines; the method of characterizing and testing the program
distribution and erase distribution in the product and the
application of this data in the test program that achieves
program and


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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erase distributions resulting in very low failure rate program
erase cycling; and the test methodology to reduce the effects
of manufacturing variability, resulting in improvements in
manufacturability and overall productivity. Test Technology
Know How does not include any particular production test
routines themselves.


1.37. ***** means a party to this Agreement providing information,
training and support to a ***** (any party other than Motorola
or AMD and who does not qualify as a *****, ***** under this
Agreement) regarding a Logic Process Technology, Embedded
Flash Technology, or other semiconductor manufacturing process
developed and/or licensed under this Agreement, and *****.


1.38. "Translation Expenses" are fees, costs, or other charges
related to translating patent applications and copyright
registrations.


1.39. "X86 Microprocessors" means microprocessors designed for
personal computers and servers compatible with X86 versions of
Microsoft Corporation's Windows(R) operating systems, and
utilizing the industry standard, X86 architecture and
instruction sets.


2. Alliance Governance


2.1. Executive Board of Directors.


The alliance will be governed by an Executive Board of Directors
comprised of eight (8) members. Four (4) members will be appointed by
AMD with the approval of Motorola and the other four (4) members will
be appointed by Motorola with the approval of AMD.


2.1.1. The following matters will require approval by the
Executive Board of Directors, in addition to any
other matters required to be approved by the
Executive Board of Directors by other terms of this
Agreement.


2.1.1.1. Appointment of new members to the Executive Board of
Directors and the Steering Committee.


2.1.1.2. Approval of Projects proposed by the Steering
Committee.


2.1.1.3. Amendments to the Logic Process Technology or
Embedded Flash Technology roadmaps.


2.1.2. Meetings: Meetings of the Executive Board of
Directors will be held


***** Certain information on this page has been omitted and filed separately with the Securities and Exchange Commission. Confidential treatment has been requested with respect to the omitted portions.


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at least monthly for the first year and thereafter as
mutually agreed. The Executive Board of Directors'
meetings may be conducted on either a face-to-face
basis or via video or telephone conference call,
whichever is mutually agreed to by the Parties at
least ten (10) business days in advance of the
meeting. Special meetings may be called by any two
members of the Executive Board of Directors, one (1)
from each party, upon at least (i) ten (10) business
days prior notice for a face-to-face meeting or (ii)
seventy-two (72) hours prior notice for a telephonic
or video conference meeting. The Executive Board of
Directors may also act without a meeting upon
unanimous written consent of all of the Board
members.


2.1.3. Quorum


2.1.3.1. A quorum of the Executive Board of Directors will
consist of at least six (6) members, including at
least three (3) members representing AMD and three
(3) members representing Motorola. No action may be
taken at any meeting of the Executive Board of
Directors in the absence of a quorum.


2.1.3.2. ...